High performance, low power 200 Gb/s 4:1 MUX with TGL in 45 nm technology

نویسندگان
چکیده

برای دانلود رایگان متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Low Power and High performance JK Flip - Flop using 45 nm Technology

-In current scenario, VLSI circuit’s greatest challenges is to reduce the power dissipation and surface area so that longer life and high performance achieved to greater extent. The key parameter is threshold voltage to reduce the leakage power. In our proposal, we design low power and high performance JK flip-flop. JK flip-flop is designed with the help of D flip-flop and with some logic gates...

متن کامل

Extended 90 nm CMOS Technology with High Manufacturability for High-Performance, Low-Power, RF/Analog Applications

High-density, 90 nm CMOS technology has been suggested for generic, low-voltage, high-performance applications. In this paper, we describe some strategies for extending the previous technology in order to fabricate the following: 1) a low-standby-power transistor with high drivability for low-power applications, 2) a high-drivability transistor, inductor, and MIM capacitor for RF/analog applica...

متن کامل

Power Optimization of 8:1 MUX using Transmission Gate Logic (TGL) with Power Gating Technique

This paper aims at reducing power and energy dissipation in Transmission Gate Logic (TGL) Multiplexer CMOS circuits comprise of reducing the power supply voltages, power supply current and delay with economical charge recovery logic. This paper designs an 8:1 Multiplexer with CMOS Transmission Gate Logic (TGL) using the Power Gating Technique, which reduces the leakage power and leakage current...

متن کامل

A SoC based low power 8-bit flash ADC in 45 nm CMOS technology

In modern VLSI design the transistor sizing and scaling has an considerable impact. There are very essential two constrains, which needs serious attention to the VLSI chip designer are high speed and low power consumption. Therefore in this paper an 8-bit 3 Gs/sec flash analog-to-digital converter (ADC) in 45nm CMOS technology is presented for low power and high speed system-on-chip (SoC) appli...

متن کامل

Comparative Analysis of Low Power 1-Bit CMOS Full Adder at 45 nm Technology

Design and simulation of conventional CMOS full adder using 45nm technology at specified node has been presented here. This research work shows comparison about post layout simulations of designed low power CMOS full adder. It also explains about performance analysis of optimized low power CMOS full adder at different loads. This design has achieved 63. 11nW active power consumption with propag...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

ژورنال

عنوان ژورنال: Applied Nanoscience

سال: 2013

ISSN: 2190-5509,2190-5517

DOI: 10.1007/s13204-013-0206-0